Literature Review—A Directional Modulation Test Platform for Reconfigurable Transmitters to Enable Space-Aware Flexible MIMO Systems
Release date:
2026-08
Preface: The current congestion of the wireless spectrum has raised numerous concerns. Directional modulation techniques can leverage a single phased-array aperture to simultaneously transmit multiple communication or radar signals in multiple directions, thereby helping to alleviate spectrum congestion. To this end, developers have built a system for multi-user… MIMO radar With a reconfigurable array transmitter for communications, this test platform can support the development and validation of reconfigurable technologies aimed at adaptive spectrum and spatial coexistence.
(Note: The data in this article are sourced from the IEEE.)
I. Platform Overview
Directional Modulation (DM) can transmit multiple streams of information simultaneously in different directions from the same antenna aperture, at the same frequency and time (as shown in Figure 1). This paper presents a transmitter test platform developed by IEEE researchers that supports DM, intended for the design of reconfigurable and MIMO arrays.
Figure 1: Example scenarios of MIMO, directional radar, and communications with a uniform linear array (ULA)
II. Design Concept and Implementation of the DM Platform (With a specific restatement)
The system consists primarily of three subsystems: 1. Reconfigurable hardware, 2. In-situ feedback, and 3. Directional modulation. To enable pre‑launch control, the developers opted for… Radio Frequency System-on-Chip (RFSOC), to support in‑situ measurements for developers’ test arrays, they utilized two transmit channels (for two transmit elements) and four receive channels within the RFSOC. Figure 2 illustrates a design concept for a fully reconfigurable transmit array intended for developers.
Figure 2. A fully reconfigurable transmit antenna array for DM, comprising reconfigurable input and output impedance-matching networks, dynamic amplifier biasing, and on‑board measurements.
As of the developer’s design concept as understood by the editor, IEEE has successfully built and validated the test platform, as shown in Figure 3. It includes components for independently controlling the phase and amplitude of each transmit channel. Xilinx ZCU208 The evaluation kit includes a narrowband Balun board that converts the balanced lines on the RFSoC to unbalanced SMA interfaces, as well as MIini-Circuits VBFZ-3590-S+ bandpass filters with a 3–43 GHz passband for each transmit channel. Figure 4 shows the setup during developer testing, with the transmit antenna and two receive antennas positioned at 80° and 165°, respectively.
Figure 3: Block Diagram of the Direction Modulation Test Platform
Figure 4: Measurement setup. In the foreground, the RFSoC is connected to a rotary stage supporting a dual‑element transmit array. The two receive antennas serve as multiple users in the developer’s MU‑MIMO system. At the top of the image, the antennas are mounted on tripods approximately 4 feet from the transmit array, forming angles of 80° with Rx 1 and 165° with Rx 2 (relative to the end‑fire direction on the right).
III. Measurement Results
The developer tested the system’s experimental verification platform at 4.2 GHz and presented the test setup (Figure 5: MATLAB GUI test platform with structural visualization).
Figure 5: The graphical user interface maps two messages to the two receivers used in H‑matrix calibration. The two plots on the left show the in-phase and quadrature components of the transmit weights for the first antenna (top) and the second antenna (bottom). The two plots on the right display the receive phases, with the first receiver at the top and the second receiver at the bottom.
As shown in Figure 5, two messages are sent to different receivers. After launching the MATLAB GUI and the LabVIEW program, forward error correction is implemented using low-density parity-check codes, which can be accessed via “ Enable FEC “The switch is either on or off. In this example, FEC is disabled.” Bits per Symbol Slider control DPSK Constellation density. At the start of transmission, the developer presses “ Start Transmit” Button. Weights are based on
Figure 5 shows that the experiment successfully transmitted two distinct messages: “ To satisfy some very young mathematician.” (Message 1 sent to receiver 1) and “ It should be obvious .” (Message 2 is sent to Receiver 2). Users can also click “ Generate Message “button, using MATLAB’s” why The function generates random messages. If the two messages differ in length, the shorter one is padded with null characters at the end to ensure equal length. Figure 5 shows that, in the GUI, the messages received by both receivers match the transmitted message; each channel carries 336 bits, and no bit errors were detected. On the right side of the GUI, the received phase plots for the different receivers are displayed. For 1-bit DPSK, the measured phase shifts are close to +90° or −90°, as expected.
To conduct further testing, the developers transmitted 100 messages over each channel, with each message consisting of 100 randomly generated ASCII characters, without error correction. The DPSK constellation was configured at a density of 1 bit per symbol, and the bit error rate at the receiver was evaluated. Table 1 summarizes the results. For the 100‑message, 100‑character test cases, Channel 1 exhibited a BER of 5.98%, while Channel 2 recorded a BER of 7.67%, primarily attributable to bit‑insertion errors.
|
|
Total number of bit errors |
Bit error rate |
Average number of bit errors |
Bit Error Tree Standard Deviation |
|
Channel 1 |
4780 |
5.98% |
47.80 |
114.37 |
|
Channel 2 |
6132 |
7.61% |
61.32 |
132.12 |
Table 1: Bit error rate statistics for 100 randomly generated messages (each 100 ASCII characters long, with 80,000 bits transmitted per channel)
A bit‑insertion error occurs when the asynchronous phase detector mistakenly detects a non‑existent symbol between actual transmitted symbols, as illustrated in Figure 6, where an uncompensated bit‑insertion error appears at bit position 10. Such erroneous bit insertion introduces a one‑bit delay to subsequent actual bits, leading to decoding errors in many downstream message bits.
Figure 6: The transmitted and received bits from the experiment in Table 1 (the first 48 bits of a 424-bit message). At the 10th bit, an uncompensated bit insertion error is observed; all subsequent bits are shifted.
Table 2: Bit Error Rate Statistics for 1,000 Randomly Generated Messages (Each Message Consists of 10 ASCII Characters; Each Channel Transmits 80,000 Bits)
|
|
Total number of bit errors |
Bit error rate |
Average number of bit errors |
Standard value for the number of bit errors |
|
Channel 1 |
1665 |
2.08% |
1.67 |
7.49 |
|
Channel 2 |
1901 |
2.38% |
1.90 |
7.77 |
To determine whether the high bit error rate was caused by bit‑insertion errors, the developers conducted a second experiment using shorter messages. After calibration, 1,000 messages were transmitted, each consisting of 10 randomly generated ASCII characters, without error correction. In Experiment 2, the total number of transmitted bits across multiple short messages was equal to that of the long messages in Experiment 1. The DPSK constellation had a density of 1 bit per symbol. As shown in Table 2, the BER was reduced by half compared to the original long‑message scenario.
|
|
Total number of bit errors |
Bit error rate |
Average number of bit errors |
Standard value for the number of bit errors |
|
Channel 1 |
1665 |
2.08% |
1.67 |
7.49 |
|
Channel 2 |
1901 |
2.38% |
1.90 |
7.77 |
Table 2: Bit Error Rate Statistics for 1,000 Randomly Generated Messages (Each Message Consists of 10 ASCII Characters; Each Channel Transmits 80,000 Bits)
As bit‑insertion errors decrease, most of the errors in this experiment are bit‑flip errors. When the message length is known, low‑density parity‑check error correction can correct bit‑flip errors. Figure 7 shows bit‑flip errors at bit positions 13 and 15.
Figure 7: Table 2 shows the bits transmitted and received in the experiment (the first 48 bits of a 712-bit message), with bit-flip errors visible at bits 13 and 15.
IV. Conclusion
This paper provides a detailed description of the implementation and validation of a test platform for realizing and evaluating directional and spectral‑adaptive array technologies, such as directional modulation. Directional modulation and its calibration have been demonstrated using a custom hardware implementation. This foundation enables the demonstration and innovation of spatial modulation—such as directional modulation—along with real‑time impedance tuning and in‑situ measurements, within spectrum‑ and space‑agile MIMO systems.
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