Notice on Hosting the 4th Birei Cup FPGA Model Machine Design Competition at Xi'an University of Posts and Telecommunications
Release date:
2020-05
Notice on Hosting the 4th Birei Cup FPGA Model Machine Design Competition at Xi'an University of Posts and Telecommunications
2. Preliminary Round Schedule: Participating teams will submit their design proposals on the competition website according to the technical guidelines outlined in the event’s official plan. Reviewing experts will evaluate the preliminary submissions using the assessment system, rank all teams accordingly, and determine which teams advance to the finals based on their scores—from highest to lowest.
To enhance undergraduates' imagination, innovation, and engineering skills in CPU-centric system design, inspire students' creative problem-solving abilities, foster their teamwork spirit, and strengthen the development of computer system capabilities at our university, we are further advancing teaching reforms in computer science and related fields. To facilitate collaboration, showcase talent, and build a platform for exchange and partnership, we are pleased to announce the following details about the 2020 Xi'an University of Posts and Telecommunications’ 4th PiRui Cup FPGA Model Machine Design Competition:
I. Eligibility Requirements and Application Process
The competition is open to all undergraduate and graduate students across the university, with no restrictions on their majors. Teams are formed on a voluntary basis. To register, please log in ( Register online at http://mcc.xupt.edu.cn/. Each team can have up to three members and is responsible for contacting their own faculty advisor.
Contact for registration: Teacher Xing Gaofeng (029–88166281). Designated QQ group for the competition: 708057992
2. Schedule Arrangement
1. Schedule (May 30 to June 12)
Online registration from May 30 to June 5;
Submit preliminary entries from June 6 to June 11;
The list of playoff team members will be announced on June 11.
Finals on June 12.
2. Preliminary Round Schedule: Participating teams will submit their design proposals on the competition website as per the technical guidelines outlined in the event’s official plan.评审 experts will evaluate the preliminary submissions using the assessment system, rank all teams accordingly, and determine which teams advance to the finals based on their scores—from highest to lowest.
3. Final Round Details: All members of participating teams must log in online on time as notified by the Organizing Committee. The final round will be conducted virtually by the Competition Organizing Committee, featuring four key components: functional testing, system demonstration, implementation of custom commands, and an online Q&A session. Expert judges will assign comprehensive scores, and awards will be determined based on the overall ranking of these scores.
3. Award Categories
The grand final of the competition will feature: - First prize: A team award consisting of a prize worth 400 yuan, along with a certificate of achievement. - Second prize: A team award comprising a prize worth 200 yuan, accompanied by a certificate of achievement. - Third prize: A team award offering a prize valued at 100 yuan, coupled with a certificate of achievement. Additionally, all instructors who guided the winning teams will receive the "Outstanding Instructor" award from the competition organizing committee.
3. Entry Requirements
1. This FPGA Model Machine Competition is grounded in the theoretical foundations of various computer hardware courses. Students are encouraged to apply their comprehensive knowledge of computer hardware to design the logic for a model computer based on the MIPS instruction architecture. Through system simulation, participants must create a design that includes at least 20 instructions and then verify it via programming. The competition fosters teams to integrate diverse concepts—such as a five-stage pipeline, interrupts, multiplication/division instructions, and instruction set extensions—while making full use of the FPGA experimental board’s hardware resources (including VGA, LCD display, UART communication, and keyboard input) to maximize the performance of their model machine. Teams with access to the Xilinx FPGA development platform are welcome to perform on-board verification using chips of any model.
2. Each participating team needs to submit the complete design content for the preliminary stage:
(1) Complete engineering files designed based on the MIPS model machine (must include all source code, simulation waveforms, and FPGA binary download files).
(2) MIPS Model Machine Design Report. If the hardware design for the final round differs in any way from the hardware design submitted during the preliminary round, you must resubmit the complete design content.
(3) If third-party IP is used or portions of someone else’s source code are incorporated, it must be clearly stated in the design report.
3. During the competition, participants may use various books, reference materials, computers, and software, as well as browse the international internet—but plagiarism or copying others' work is strictly prohibited. The organizing committee will carefully review all submitted proposals, and any team found cheating will have their participation disqualified and face public criticism.
Herewith notification.
College of Computer Science
The Organizing Committee of the Pi Rui Cup FPGA Model Machine Competition
May 29, 2020
Keywords:
Contact Us
Phone:+86-29-84508304
Website: www.interwiser.com
Address: 25th Floor, Building E, Xidian Science & Technology Park, No. 168 Kechuang Road, Yanta District, Xi'an City
